/* * Copyright (C) 1991 by the University of Waterloo.All rights reserved. * * vopcodes -- symbolic definitions for System/370 vector instructions * * Ref. System/370 Reference Summary (GX20-1850). */ #ifndef _VOPCODES_H_INCLUDED #define _VOPCODES_H_INCLUDED #define OP_VAE 0xa400 /* add (S) */ #define OP_VSE 0xa401 /* subtract (S) */ #define OP_VME 0xa402 /* multiply (S/L) */ #define OP_VDE 0xa403 /* divide (S) */ #define OP_VMAE 0xa404 /* multiply and add (S/L) */ #define OP_VMSE 0xa405 /* multiply and subtract (S/L) */ #define OP_VMCE 0xa406 /* multiply and accumulate (S) */ #define OP_VACE 0xa407 /* accumulate (S/L) */ #define OP_VCE 0xa408 /* compare (S) */ #define OP_VL 0xa409 /* load */ #define OP_VLE 0xa409 /* load (S) */ #define OP_VLM 0xa40a /* load matched */ #define OP_VLME 0xa40a /* load matched (S) */ #define OP_VLY 0xa40b /* load expanded */ #define OP_VLYE 0xa40b /* load expanded (S) */ #define OP_VST 0xa40d /* store */ #define OP_VSTE 0xa40d /* store (S) */ #define OP_VSTM 0xa40e /* store matched */ #define OP_VSTME 0xa40e /* store matched (S) */ #define OP_VSTK 0xa40f /* store compressed */ #define OP_VSTKE 0xa40f /* store compressed (S) */ #define OP_VAD 0xa410 /* add (L) */ #define OP_VSD 0xa411 /* subtract (L) */ #define OP_VMD 0xa412 /* multiply (L) */ #define OP_VDD 0xa413 /* divide (L) */ #define OP_VMAD 0xa414 /* multiply and add (L) */ #define OP_VMSD 0xa415 /* multiply and subtract (L) */ #define OP_VMCD 0xa416 /* multiply and accumulate (L) */ #define OP_VACD 0xa417 /* accumulate (L) */ #define OP_VCD 0xa418 /* compare (L) */ #define OP_VLD 0xa419 /* load (L) */ #define OP_VLMD 0xa41a /* load matched (L) */ #define OP_VLYD 0xa41b /* load expanded (L) */ #define OP_VSTD 0xa41d /* store (L) */ #define OP_VSTMD 0xa41e /* store matched (L) */ #define OP_VSTKD 0xa41f /* store compressed (L) */ #define OP_VA 0xa420 /* add */ #define OP_VS 0xa421 /* subtract */ #define OP_VM 0xa422 /* multiply */ #define OP_VN 0xa424 /* and */ #define OP_VO 0xa425 /* or */ #define OP_VX 0xa426 /* exclusive or */ #define OP_VC 0xa428 /* compare */ #define OP_VLH 0xa429 /* load halfwrod */ #define OP_VLINT 0xa42a /* load integer vector */ #define OP_VSTH 0xa42d /* store halfword */ #define OP_VAES 0xa480 /* add (S) */ #define OP_VSES 0xa481 /* subtract (S) */ #define OP_VMES 0xa482 /* multiply (S/L) */ #define OP_VDES 0xa483 /* divide (S) */ #define OP_VMAES 0xa484 /* multiply and add (S/L) */ #define OP_VMSES 0xa485 /* multiply and subtract (S/L) */ #define OP_VCES 0xa488 /* compare (S) */ #define OP_VADS 0xa490 /* add (L) */ #define OP_VSDS 0xa491 /* subtract (L) */ #define OP_VMDS 0xa492 /* multiply (L) */ #define OP_VDDS 0xa493 /* divide (L) */ #define OP_VMADS 0xa494 /* multiply and add (L) */ #define OP_VMSDS 0xa495 /* multiply and subtract (L) */ #define OP_VCDS 0xa498 /* compare (L) */ #define OP_VAS 0xa4a0 /* add */ #define OP_VSS 0xa4a1 /* subtract */ #define OP_VMS 0xa4a2 /* multiply */ #define OP_VNS 0xa4a4 /* and */ #define OP_VOS 0xa4a5 /* or */ #define OP_VXS 0xa4a6 /* exclusive or */ #define OP_VCS 0xa4a8 /* compare */ #define OP_VAER 0xa500 /* add (S) */ #define OP_VSER 0xa501 /* subtract (S) */ #define OP_VMER 0xa502 /* multiply (S/L) */ #define OP_VDER 0xa503 /* divide (S) */ #define OP_VMCER 0xa506 /* multiply and accumulate (S) */ #define OP_VACER 0xa507 /* accumulate (S/L) */ #define OP_VCER 0xa508 /* compare (S) */ #define OP_VLER 0xa509 /* load (S) */ #define OP_VLR 0xa509 /* load */ #define OP_VLMER 0xa50a /* load matched (S) */ #define OP_VLMR 0xa50a /* load matched */ #define OP_VLZER 0xa50b /* load zero (S) */ #define OP_VLZR 0xa50b /* load zero */ #define OP_VADR 0xa510 /* add (L) */ #define OP_VSDR 0xa511 /* subtract (L) */ #define OP_VMDR 0xa512 /* multiply (L) */ #define OP_VDDR 0xa513 /* divide (L) */ #define OP_VMCDR 0xa516 /* multiply and accumulate (L) */ #define OP_VACDR 0xa517 /* accumulate (L) */ #define OP_VCDR 0xa518 /* compare (L) */ #define OP_VLDR 0xa519 /* load (L) */ #define OP_VLMDR 0xa51a /* load matched (L) */ #define OP_VLZDR 0xa51b /* load zero (L) */ #define OP_VAR 0xa520 /* add */ #define OP_VSR 0xa521 /* subtract */ #define OP_VMR 0xa522 /* multiply */ #define OP_VNR 0xa524 /* and */ #define OP_VOR 0xa525 /* or */ #define OP_VXR 0xa526 /* exclusive or */ #define OP_VCR 0xa528 /* compare */ #define OP_VLPER 0xa540 /* load positive (S) */ #define OP_VLNER 0xa541 /* load negative (S) */ #define OP_VLCER 0xa542 /* load complement (S) */ #define OP_VLPDR 0xa550 /* load positive (L) */ #define OP_VLNDR 0xa551 /* load negative (L) */ #define OP_VLCDR 0xa552 /* load complement (L) */ #define OP_VLPR 0xa560 /* load positive */ #define OP_VLNR 0xa561 /* load negative */ #define OP_VLCR 0xa562 /* load complement */ #define OP_VAEQ 0xa580 /* add (S) */ #define OP_VSEQ 0xa581 /* subtract (S) */ #define OP_VMEQ 0xa582 /* multiply (S/L) */ #define OP_VDEQ 0xa583 /* divide (S) */ #define OP_VMAEQ 0xa584 /* multiply and add (S/L) */ #define OP_VMSEQ 0xa585 /* multiply and subtract (S/L) */ #define OP_VCEQ 0xa588 /* compare (S) */ #define OP_VLEQ 0xa589 /* load (S) */ #define OP_VLMEQ 0xa58a /* load matched (S) */ #define OP_VADQ 0xa590 /* add (L) */ #define OP_VSDQ 0xa591 /* subtract (L) */ #define OP_VMDQ 0xa592 /* multiply (L) */ #define OP_VDDQ 0xa593 /* divide (L) */ #define OP_VMADQ 0xa594 /* multiply and add (L) */ #define OP_VMSDQ 0xa595 /* multiply and subtract (L) */ #define OP_VCDQ 0xa598 /* compare (L) */ #define OP_VLDQ 0xa599 /* load (L) */ #define OP_VLMDQ 0xa59a /* load matched (L) */ #define OP_VAQ 0xa5a0 /* add */ #define OP_VSQ 0xa5a1 /* subtract */ #define OP_VMQ 0xa5a2 /* multiply */ #define OP_VNQ 0xa5a4 /* and */ #define OP_VOQ 0xa5a5 /* or */ #define OP_VXQ 0xa5a6 /* exclusive or */ #define OP_VCQ 0xa5a8 /* compare */ #define OP_VLQ 0xa5a9 /* load */ #define OP_VLMQ 0xa5aa /* load matched */ #define OP_VMXSE 0xa600 /* maximum signed (S) */ #define OP_VMNSE 0xa601 /* minimum signed (S) */ #define OP_VMXAE 0xa602 /* maximum absolute (S) */ #define OP_VLELE 0xa608 /* load element (S) */ #define OP_VXELE 0xa609 /* extract element (S) */ #define OP_VMXSD 0xa610 /* maximum signed (L) */ #define OP_VMNSD 0xa611 /* minimum signed (L) */ #define OP_VMXAD 0xa612 /* maximum absolute (L) */ #define OP_VLELD 0xa618 /* load element (L) */ #define OP_VXELD 0xa619 /* extract element (L) */ #define OP_VSPSD 0xa61a /* sum partial sums (L) */ #define OP_VZPSD 0xa61b /* zero partial sums (L) */ #define OP_VLEL 0xa628 /* load element */ #define OP_VXEL 0xa629 /* extract element */ #define OP_VTVM 0xa640 /* test VMR */ #define OP_VCVM 0xa641 /* complement VMR */ #define OP_VCZVM 0xa642 /* count left zeros in VMR */ #define OP_VCOVM 0xa643 /* count ones in VMR */ #define OP_VXVC 0xa644 /* extract VCT */ #define OP_VLVCU 0xa645 /* load VCT and update */ #define OP_VXVMM 0xa646 /* extract vector mask mode */ #define OP_VRRS 0xa648 /* restore VR */ #define OP_VRSVC 0xa649 /* save changed VR */ #define OP_VRSV 0xa64a /* save VR */ #define OP_VLVM 0xa680 /* load VMR */ #define OP_VLCVM 0xa681 /* load VMR complement */ #define OP_VSTVM 0xa682 /* store VMR */ #define OP_VNVM 0xa684 /* and to VMR */ #define OP_VOVM 0xa685 /* or to VMR */ #define OP_VXVM 0xa686 /* exclusive or to VMR */ #define OP_VSRSV 0xa6c0 /* save VSR */ #define OP_VMRSV 0xa6c1 /* save VMR */ #define OP_VSRRS 0xa6c2 /* restore VSR */ #define OP_VMRRS 0xa6c3 /* restore VMR */ #define OP_VLVCA 0xa6c4 /* load VCT from address */ #define OP_VRCL 0xa6c5 /* clear VR */ #define OP_VSVMM 0xa6c6 /* set vector mask mode */ #define OP_VSTVP 0xa6c8 /* store vector parameters */ #define OP_VACSV 0xa6ca /* save VAC */ #define OP_VACRS 0xa6cb /* restore VAC */ #define OP_VLI 0xe400 /* load indirect */ #define OP_VLIE 0xe400 /* load indirect (S) */ #define OP_VSTI 0xe401 /* store indirect */ #define OP_VSTIE 0xe401 /* store indirect (S) */ #define OP_VLID 0xe410 /* load indirect (L) */ #define OP_VSTID 0xe411 /* store indirect (L) */ #define OP_VSRL 0xe424 /* shift right single logical */ #define OP_VSLL 0xe425 /* shift left single logical */ #define OP_VLBIX 0xe428 /* load bit index */ #endif /* _VOPCODES_H_INCLUDED */